Semiconductors

Doping, electrons and holes

How a few parts per million of phosphorus or boron turn silicon into n-type or p-type material.

Day 1 · 40 min

After this lesson

You can describe donors, acceptors, majority and minority carriers.
You can compute conductivity and resistivity from doping and mobility.
You can tell drift from diffusion and say when each dominates.

A few atoms per million change everything

Pure silicon at room temperature is a poor conductor. With n = p = n_i ≈ 1 × 10¹⁰ cm⁻³ its resistivity is a few hundred thousand Ω·cm, about 10¹¹ times worse than copper. Material like this, whose carriers come only from heat, is called intrinsic. Adding impurity atoms on purpose, doping, makes it extrinsic, and a tiny amount goes a long way: 10¹⁶ phosphorus atoms per cm³, one for every five million silicon atoms (0.2 parts per million), lowers the resistivity to about 0.5 Ω·cm, roughly half a million times lower.

Donors and acceptors

Phosphorus and arsenic sit in group V of the periodic table with five valence electrons. On a silicon site, four of them form bonds and the fifth is held by only about 45 meV (54 meV for arsenic). That is less than twice the 26 meV of thermal energy at 300 K, so practically every such donor is ionized: it contributes one free electron and becomes a fixed positive ion. Silicon doped this way is n-type, and electrons are its majority carriers.

Boron, in group III, has only three valence electrons, so one of its four bonds is an electron short. A neighbouring electron needs only about 45 meV to hop in, which leaves a mobile empty state, a hole, wandering through the valence band and a fixed negative boron ion behind. Boron is an acceptor, and the result is p-type silicon with holes as the majority carriers. Aluminium and gallium are acceptors too, but boron is the standard choice in silicon (aluminium is used in SiC).

A phosphorus donor gives up its fifth electron and becomes a fixed P⁺ ion; a boron acceptor takes an electron from a neighbouring bond, leaving a mobile hole and a fixed B⁻ ion.

Majority, minority and the mass-action law

Doping does not just add carriers; it removes the other kind. In equilibrium the product of the electron and hole densities is fixed by temperature: n · p = n_i². Add 10¹⁶ donors per cm³ and n ≈ 10¹⁶, so p = (10¹⁰)² / 10¹⁶ = 10⁴ cm⁻³, because the extra electrons recombine with most of the thermally generated holes. Holes in n-type material, and electrons in p-type, are minority carriers. Here they are outnumbered a trillion to one, yet they matter enormously: diodes and bipolar transistors work by injecting minority carriers, and minority carriers carry leakage current.

If a region holds both donors and acceptors they compensate, and the net doping is |N_D − N_A|. Fabs rely on this constantly, implanting an n-well into a p-type wafer and then p⁺ source and drain regions into that well.

Region	Doping (cm⁻³)	Typical resistivity
Drift layer of a 1200 V silicon power device	10¹³ to 10¹⁴	about 45 to 450 Ω·cm
Standard p-type CMOS starting wafer	about 10¹⁵	about 14 Ω·cm
Wells and transistor channels	10¹⁶ to 10¹⁸	about 0.02 to 1.5 Ω·cm
Source and drain contacts (n⁺, p⁺)	10¹⁹ to 10²⁰	about 1 to 10 mΩ·cm

Conductivity from carriers and mobility

At modest fields the average drift velocity of a carrier is proportional to the field, v = μE. The mobility μ measures how freely a carrier moves between collisions. In lightly doped silicon at 300 K, μn ≈ 1400 cm²/V·s for electrons and μp ≈ 450 cm²/V·s for holes. Electrons are about three times more mobile, which is why NMOS transistors are faster and PMOS transistors are drawn two to three times wider. Conductivity adds the two contributions, σ = q (n μn + p μp), and resistivity is ρ = 1/σ. For n-type silicon with N_D = 10¹⁶ cm⁻³ the hole term is negligible and σ ≈ 1.6 × 10⁻¹⁹ × 10¹⁶ × 1400 ≈ 2.2 S/cm.

Mobility falls as doping rises, because every ionized dopant deflects passing carriers: μn is about 1200 at 10¹⁶, 270 at 10¹⁸ and 110 cm²/V·s at 10¹⁹ cm⁻³. It also falls with temperature as lattice vibrations grow, which is the main reason a silicon MOSFET's on-resistance rises by roughly 1.5 to 2 times between 25 °C and 125 °C.

Drift and diffusion

Carriers move for two reasons. Drift is motion in an electric field. At 1 kV/cm (1 V across 10 µm), electrons drift at 1400 × 1000 = 1.4 × 10⁶ cm/s, or 14 km/s, a slow bias on top of random thermal motion near 100 km/s. Above a few tens of kV/cm the drift velocity saturates near 10⁷ cm/s, which limits short-channel transistors. Diffusion is motion down a concentration gradient, J = qD·dn/dx, the same physics as ink spreading in water. The diffusion constant follows from mobility through the Einstein relation, D = μkT/q, so Dn ≈ 1400 × 0.0259 ≈ 36 cm²/s and Dp ≈ 12 cm²/s.

Which one dominates depends on where you look. In a resistor or a MOSFET channel, majority carriers move under an applied field: drift. In the base of a bipolar transistor, or just outside a forward-biased p-n junction, injected minority carriers spread out with almost no field: diffusion. Inside a p-n junction at equilibrium the two balance exactly, which is the subject of the next lesson.

Resistivity and sheet resistance

For a bar, R = ρL / (W·t). Doped layers in chips are thin, so engineers fold the thickness in and quote sheet resistance, R_s = ρ/t, in ohms per square (Ω/□). Any square of the layer, whatever its size, measures R_s edge to edge, so a resistor is simply R_s × L/W, the number of squares. A 0.2 µm layer doped to 10¹⁹ cm⁻³ (ρ ≈ 5.6 mΩ·cm) has R_s ≈ 280 Ω/□, so a strip 100 µm long and 10 µm wide is 10 squares, 2.8 kΩ. Sheet resistance is measured with a four-point probe: force current through the outer two needles, sense the voltage across the inner two, and for a thin layer on a large wafer R_s = 4.53 × V/I.

How dopants get in

Diffusion: expose the wafer to a dopant source such as POCl₃ (phosphorus) or BBr₃ (boron) at 900-1100 °C so atoms soak in from the surface. It is cheap and still used for solar cells, but depth and profile are hard to control finely.
Ion implantation: ionize a dopant gas (BF₃, PH₃, AsH₃), accelerate the ions to a few keV or up to MeV, and scan the beam across the wafer. The dose is counted by integrating beam current, so 10¹⁵ ions/cm² lands within about 1%, and photoresist masks where it goes. Each ion knocks silicon atoms out of place, and most dopants stop between lattice sites.
Activation anneal: 1000-1100 °C for seconds (rapid thermal or spike anneal) or milliseconds (flash or laser anneal) repairs the damage and moves dopants onto lattice sites, where they become active. Until then most implanted atoms donate no carriers at all.

Interactive: dope the lattice

Doping lattice: electrons and holes

A 2-D cartoon of the silicon lattice; each pair of lines is a two-electron bond. Cyan dots are free electrons, pink rings are holes, and the dim one is a minority carrier. Turn on the field: electrons and holes drift in opposite directions, electrons about three times faster, yet both carry current the same way.

Material

Doping concentration1.0 × 10¹⁶ cm⁻³

Electrons n: 1.0 × 10¹⁶ cm⁻³
Holes p: 1.0 × 10⁴ cm⁻³
Mobility μn / μp: 1172 / 411 cm²/V·s
Conductivity σ = q(nμn + pμp): 1.88 S/cm
Resistivity ρ = 1/σ: 0.533 Ω·cm
Drift speed at 1 kV/cm (e⁻ / h⁺): 11.7 / 4.1 km/s
Dopant atoms: 1 in 5 million Si atoms

Things to try:

Compare n-type and p-type at the same doping: the p-type resistivity is about three times higher because holes are less mobile.
Sweep the doping from 10¹⁴ to 10¹⁹ cm⁻³: resistivity drops by about 8,000 times rather than 100,000, because mobility falls as dopants crowd the lattice.
Turn on the field: electrons drift toward the positive plate and holes toward the negative plate, yet both carry conventional current in the same direction as E.

In practice

Practice

Resistivity of n-type silicon at 10¹⁶ cm⁻³

A wafer is doped n-type with 1 × 10¹⁶ phosphorus atoms per cm³. Using μn = 1400 cm²/V·s, find the hole density, the conductivity and the resistivity. Then find the sheet resistance of a 2 µm thick layer of the same material, and the resistance of a strip of it 200 µm long and 20 µm wide.

text

n   ≈ N_D = 1e16 cm^-3
p   = n_i^2 / n = (1e10)^2 / 1e16 = 1e4 cm^-3   (hole term negligible)

σ   = q · n · μn = 1.602e-19 × 1e16 × 1400 = 2.24 S/cm
ρ   = 1 / σ = 0.45 Ω·cm

R_s = ρ / t = 0.45 Ω·cm / 2e-4 cm = 2230 Ω/□
R   = R_s × L/W = 2230 × (200 / 20) = 22.3 kΩ

Answer: p = 10⁴ cm⁻³, σ ≈ 2.2 S/cm, ρ ≈ 0.45 Ω·cm, R_s ≈ 2.2 kΩ/□ and the strip is about 22 kΩ. With the doping-dependent mobility the visualization uses (μn ≈ 1170 cm²/V·s at 10¹⁶), the resistivity comes out at 0.53 Ω·cm, close to what a four-point probe reads on a real wafer. Textbook mobilities are a good first estimate; check the mobility at your actual doping before trusting the second digit.

Real-world scenario

Two 'identical' wafers, three times the resistance

A mixed-signal chip uses an implanted n-type resistor layer: phosphorus at 5 × 10¹³ cm⁻² and 150 keV, followed by a 1050 °C spike anneal, with a target sheet resistance of 500 Ω/□ ± 5%. A 25-wafer lot comes back from the line with 23 wafers on target and two that are wildly off. Production wants to know whether to scrap the two wafers and whether the implanter is drifting.

Symptoms

Four-point probe: 23 wafers read 492-508 Ω/□, while wafers 14 and 15 read about 1.5 kΩ/□, three times the target
The implanter log shows identical dose, energy and beam current for all 25 wafers
SIMS on wafer 14 shows the same phosphorus depth profile, atom for atom, as a good wafer
Resistors on wafers 14 and 15 are 3× too high and have a different temperature coefficient from the rest

Interview questions

screenWhat is the difference between n-type and p-type silicon?

N-type silicon is doped with a group V element such as phosphorus or arsenic, whose fifth valence electron is freed at room temperature, so electrons are the majority carriers. P-type silicon is doped with a group III element, almost always boron, which leaves a bond short of an electron and creates a mobile hole, so holes are the majority. In both cases the dopant ion left behind is fixed in the lattice, positive for donors and negative for acceptors. Typical doping runs from about 10¹⁵ cm⁻³ in wafers up to 10²⁰ cm⁻³ in source and drain contacts.

screenSilicon is doped with 10¹⁷ phosphorus atoms per cm³. How many holes are there, and why?

In equilibrium the product n times p equals n_i squared, about 10²⁰ cm⁻⁶ for silicon at 300 K. With n ≈ 10¹⁷ cm⁻³, p = 10²⁰ / 10¹⁷ = 10³ holes per cm³. The extra electrons recombine with most of the thermally generated holes, so the minority density falls as the majority density rises. Those few minority carriers still matter, because they carry leakage current and they are exactly what diodes and bipolar transistors inject.

deepExplain drift and diffusion current and give a device where each one dominates.

Drift is carrier motion driven by an electric field, with average velocity μE, and it dominates where majority carriers see an applied voltage, such as a resistor or the channel of a MOSFET in its linear region. Diffusion is motion down a concentration gradient, J = qD·dn/dx, and it dominates where minority carriers are injected into a region with almost no field, such as the base of a bipolar transistor. The two are linked by the Einstein relation D = μkT/q, so electrons, with about three times the mobility of holes, also diffuse about three times faster. In a p-n junction at equilibrium the drift and diffusion currents of each carrier cancel exactly, and that balance is what sets the built-in potential.

deepWhy are NMOS transistors faster than PMOS transistors of the same size, and what do designers do about it?

An NMOS channel carries electrons and a PMOS channel carries holes, and in bulk silicon electron mobility is about 1400 against 450 cm²/V·s, roughly three times higher; in real inversion layers the ratio is closer to two or three. For the same width a PMOS delivers well under half the current, so it charges its load more slowly. Designers make PMOS devices two to three times wider to balance rise and fall times, and they prefer NAND gates, where the PMOS devices sit in parallel, over NOR gates, where they sit in series. Since Intel's 90 nm process in 2003, fabs have also strained the channel, using SiGe in the PMOS source and drain, to raise hole mobility.

screenWhat is sheet resistance, and how do you measure it?

Sheet resistance is resistivity divided by layer thickness, quoted in ohms per square, because every square of a uniform thin layer has the same edge-to-edge resistance whatever its size. A resistor drawn in that layer is R_s times its length-to-width ratio, so a 10-square strip of a 280 Ω/□ layer is 2.8 kΩ. It is measured with a four-point probe: current is forced through the two outer needles and voltage is sensed across the two inner ones, which removes contact resistance from the reading. For a thin layer on a large wafer, R_s = 4.53 × V/I.

References and further reading

Where the ideas in this lesson come from, and what to read next. Books are the standard texts; papers are the original sources; standards are what employers work to.

Book
Ben G. Streetman and Sanjay K. Banerjee (2015). Solid State Electronic Devices. Pearson, 7th edition.
Read: The chapter on carriers: doping, mobility, drift and diffusion.
Book
Donald A. Neamen (2012). Semiconductor Physics and Devices: Basic Principles. McGraw-Hill, 4th edition.
Read: Worked examples on resistivity from doping level.
Book
S. M. Sze and Kwok K. Ng (2007). Physics of Semiconductor Devices. Wiley, 3rd edition.
Read: The mobility-versus-doping curves the viz is modelled on.

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